{"id":7041,"date":"2022-12-06T14:56:24","date_gmt":"2022-12-06T14:56:24","guid":{"rendered":"https:\/\/bernhardrinner.com\/?page_id=7041"},"modified":"2026-02-24T07:24:55","modified_gmt":"2026-02-24T07:24:55","slug":"design-of-digital-circuits","status":"publish","type":"page","link":"https:\/\/bernhardrinner.com\/?page_id=7041","title":{"rendered":"Design of Digital Circuits"},"content":{"rendered":"\n<blockquote class=\"wp-block-quote is-layout-flow wp-block-quote-is-layout-flow\">\n<p><em>This undergraduate lecture introduces the fundamentals of the design of digital circuits. Topics include Boolean algebra, combinatorial circuits, arithmetic circuits, flip flops, sequential circuits, memory systems, and computer architecture basics. The lecture is held in English in the summer term, primarily for the Bachelor program &#8220;<a href=\"https:\/\/www.aau.at\/en\/studien\/bachelor-robotics-artificial-intelligence\/\">Robotics and Artificial Intelligence<\/a>&#8220;. A <a href=\"https:\/\/bernhardrinner.com\/?page_id=6126\" data-type=\"page\" data-id=\"6126\">German version<\/a> of this lecture is offered for the study program &#8220;<a href=\"https:\/\/www.aau.at\/en\/studien\/information-and-communications-engineering-branch-of-study-engineering\/\">Informationstechnik<\/a>&#8221; in the winter term.<\/em><\/p>\n<\/blockquote>\n\n\n\n<h2 class=\"wp-block-heading\">Objectives and Method<\/h2>\n\n\n\n<p>The lecture<em>\u00a0Design of Digital Circuits<\/em>\u00a0provides the student with essential basic knowledge and terminology for digital systems and provides methods for the analysis and design of digital circuits. It is a mandatory lecture of the bachelor program \u201cRobotics and Artificial Intelligence\u201d and is scheduled for the second semester. A German version is offered as part of the <strong>introductory orientation phase (STEOP)<\/strong> of the bachelor program \u201cInformationstechnik\u201d in the first semester. <br>For the exact schedule, please refer to the <a href=\"https:\/\/campus.aau.at\/studium\/course\/122654\">university\u2019s campus system<\/a>.<\/p>\n\n\n\n<p>The lecture is structured in 11 chapters:<\/p>\n\n\n\n<ol class=\"wp-block-list\">\n<li>Introduction<\/li>\n\n\n\n<li>Number Systems und Codes<\/li>\n\n\n\n<li>Boolean Algebra<\/li>\n\n\n\n<li>Combinational Logic<\/li>\n\n\n\n<li>Simplification of Logic Circuits<\/li>\n\n\n\n<li>Combinational Functional Blocks<\/li>\n\n\n\n<li>Arithmetic Combinational Logic<\/li>\n\n\n\n<li>Sequential Logic<\/li>\n\n\n\n<li>Standard Sequential Circuits<\/li>\n\n\n\n<li>Memory<\/li>\n\n\n\n<li>Microprocessor Basics<\/li>\n<\/ol>\n\n\n\n<p>The lecture follows a <em>&#8220;bottom-up design principle&#8221;<\/em>, in which more complex circuits are realized with the help of simpler (and already known) components. Particular emphasis is placed on teaching <em>methods for modeling and designing<\/em> digital circuits. These methods cover number systems, logic, set theory, algebra, and finite state machines and are introduced accordingly. As a <em>fundamental teaching objective<\/em> after completing the lecture, students should be able to explain a simple processor&#8217;s structure and functioning and analyze and design the necessary components (sequential logic and combinational logic).<\/p>\n\n\n\n<p>A separate two-hour <em>course (KS)<\/em> and a <em>student tutorial (TU)<\/em> complement the lecture and offer the opportunity to deepen the methods discussed in the lecture. Furthermore, the course covers the design of simple digital circuits and the analysis of the circuit&#8217;s functionality with the help of the <a href=\"https:\/\/github.com\/logisim-evolution\">Logisim <\/a>simulation environment. The installation and use of the simulation environment will be discussed in the course.<\/p>\n\n\n\n<h5 class=\"wp-block-heading\">Lecture Material<\/h5>\n\n\n\n<p>The lecture material on this website is password-protected and contain slides and exercise sheets for self-evaluation. You will receive the password at the beginning of the lecture. Solutions of the exercise sheets will not be checked. During the lecture, selected examples will be discussed. Short videos explain how selected digital circuits work using the Logisim simulation environment.<\/p>\n\n\n\n<p><\/p>\n\n\n\n<p><strong>Tip<\/strong>: <em><em>Solve the exercises on the exercise sheets alone or in a study group during the semester. This helps to consolidate your knowledge and prepare you well for the exam<\/em><\/em>.<\/p>\n\n\n\n<p>The lecture is accompanied by the following textbook: <br>Morris Mano, Charles R. Kime, Tom Martin. <a href=\"https:\/\/wps.pearsoned.com\/ecs_mano_lcdf_5\/248\/63706\/16308896.cw\/index.html\">Logic and Computer Design Fundamentals<\/a>. Pearson, 2016. <br>Several copies are available in the university library. <\/p>\n\n\n\n<p><a href=\"https:\/\/pervasive.aau.at\/BR\/teaching\/ddc\/Code of Conduct_TeWi_EN.pdf\" data-type=\"URL\">Code of Conduct (PDF)<\/a> for studies of the Faculty of Technical Sciences.<\/p>\n\n\n\n<p><a href=\"https:\/\/pervasive.aau.at\/BR\/teaching\/ddc\/DDC_Chap_0.pdf\" data-type=\"URL\">Content and Organization (PDF<\/a>) provides an overview of the lecture&#8217;s content and organization.<\/p>\n\n\n\n<h5 class=\"wp-block-heading\">Exam<\/h5>\n\n\n\n<p>The assessment is based on a 90-minutes written exam. Three exam dates will be offered for each semester.<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><a href=\"https:\/\/pervasive.aau.at\/BR\/teaching\/ddc\/DDC_TestExam.pdf\">Example exam 1 (PDF)<\/a><\/li>\n\n\n\n<li><a href=\"https:\/\/pervasive.aau.at\/BR\/teaching\/ddc\/DDC_Exam_20230706.pdf\">Example exam 2 (PDF)<\/a><\/li>\n\n\n\n<li>The following document about the microprocessors (Chapter 11) will be provided for the exam: <a href=\"https:\/\/pervasive.aau.at\/BR\/teaching\/ddc\/DDC_ExamSupplement.pdf\">ExamSupplement (PDF)<\/a>. No other documents are allowed.<\/li>\n<\/ul>\n\n\n\n<h2 class=\"wp-block-heading\">Contents<\/h2>\n\n\n\n<h4 class=\"wp-block-heading\">1. Introduction<\/h4>\n\n\n\n<p>History of computing machines; introduction of digital circuits<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><a href=\"https:\/\/pervasive.aau.at\/BR\/teaching\/ddc\/DDC_Chap_01.pdf\">Slides Chapter 1 (PDF)<\/a><\/li>\n\n\n\n<li><a href=\"https:\/\/pervasive.aau.at\/BR\/teaching\/ddc\/DDC_Chap_01_SE.pdf\">Self-Evaluation Sheet 1 (PDF)<\/a><\/li>\n<\/ul>\n\n\n\n<p>A series of articles on major developments in computer technology over the last 75 years (from the magazine <em>&#8220;Computer&#8221;<\/em>):<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li>Kshetri, Voas, Sharma. <a href=\"https:\/\/ieeexplore.ieee.org\/document\/9353495\">Computing and Socioeconomic Transformations<\/a>. <em>Computer<\/em>, 54(2):26-29, 2021.<\/li>\n\n\n\n<li>Kshetri, Voas. <a href=\"https:\/\/ieeexplore.ieee.org\/document\/9426977\">Major Computing Technologies of the Past 75 Years<\/a>. Computer, 54(5):15-21, 2021.<\/li>\n<\/ul>\n\n\n\n<p>The well-known magazine <a href=\"https:\/\/www.science.org\/toc\/science\/378\/6621\">Science <\/a>has published a special issue to mark the <strong>75th anniversary of the invention of the transistor<\/strong>. It also contains a critical <a href=\"https:\/\/www.science.org\/doi\/10.1126\/science.adf8117\">editorial<\/a> on William Shockley, who, together with John Bardeen and Walter Brattain, received the 1956 Nobel Prize in Physics for this invention.<\/p>\n\n\n\n<h4 class=\"wp-block-heading\">2. Number Systems and Codes<\/h4>\n\n\n\n<p>Number representation; codes and codierung; binary arithmetic<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><a href=\"https:\/\/pervasive.aau.at\/BR\/teaching\/ddc\/DDC_Chap_02.pdf\">Slides Chapter 2 (PDF)<\/a><\/li>\n\n\n\n<li><a href=\"https:\/\/pervasive.aau.at\/BR\/teaching\/ddc\/DDC_Chap_02_SE.pdf\">Self-Evaluation Sheet 2 (PDF)<\/a><\/li>\n<\/ul>\n\n\n\n<h4 class=\"wp-block-heading\">3. Boolean Algebra<\/h4>\n\n\n\n<p>Circuits and truth tables; Boolean algebra; standard forms<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><a href=\"https:\/\/pervasive.aau.at\/BR\/teaching\/ddc\/DDC_Chap_03.pdf\">Slides Chapter 3 (PDF)<\/a><\/li>\n\n\n\n<li><a href=\"https:\/\/pervasive.aau.at\/BR\/teaching\/ddc\/DDC_Chap_03_SE.pdf\">Self-Evaluation Sheet 3 (PDF)<\/a><\/li>\n<\/ul>\n\n\n\n<h4 class=\"wp-block-heading\">4. Combinational Logic<\/h4>\n\n\n\n<p>Logic gates; synthesis of digital circuits; temporal behavior<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><a href=\"https:\/\/pervasive.aau.at\/BR\/teaching\/ddc\/DDC_Chap_04.pdf\">Slides Chapter 4 (PDF)<\/a><\/li>\n\n\n\n<li><a href=\"https:\/\/pervasive.aau.at\/BR\/teaching\/ddc\/DDC_Chap_04_SE.pdf\">Self-Evaluation Sheet 4 (PDF)<\/a><\/li>\n<\/ul>\n\n\n\n<div class=\"wp-block-columns is-layout-flex wp-container-core-columns-is-layout-28f84493 wp-block-columns-is-layout-flex\">\n<div class=\"wp-block-column is-layout-flow wp-block-column-is-layout-flow\">\n<div class=\"wp-block-columns is-layout-flex wp-container-core-columns-is-layout-28f84493 wp-block-columns-is-layout-flex\">\n<div class=\"wp-block-column is-layout-flow wp-block-column-is-layout-flow\" style=\"flex-basis:50%\">\n<figure class=\"wp-block-embed is-type-video is-provider-youtube wp-block-embed-youtube wp-embed-aspect-16-9 wp-has-aspect-ratio\"><div class=\"wp-block-embed__wrapper\">\n<iframe loading=\"lazy\" title=\"Function of a simple combinational logic circuit (lecture &quot;Design of Digital Circuits&quot;)\" width=\"800\" height=\"450\" src=\"https:\/\/www.youtube.com\/embed\/iawOL12OMpA?feature=oembed\" frameborder=\"0\" allow=\"accelerometer; autoplay; clipboard-write; encrypted-media; gyroscope; picture-in-picture; web-share\" referrerpolicy=\"strict-origin-when-cross-origin\" allowfullscreen><\/iframe>\n<\/div><figcaption class=\"wp-element-caption\">Explanation of the function of a simple combinational circuit with the simulator LogiSim.<br>[Projectfile for Logisim-evolution: <a href=\"https:\/\/pervasive.aau.at\/BR\/teaching\/eds\/Schaltnetz1.circ\">Schaltnetz1.circ<\/a> (save as file)]<\/figcaption><\/figure>\n\n\n\n<p><\/p>\n<\/div>\n\n\n\n<div class=\"wp-block-column is-layout-flow wp-block-column-is-layout-flow\" style=\"flex-basis:50%\"><\/div>\n<\/div>\n<\/div>\n<\/div>\n\n\n\n<h4 class=\"wp-block-heading\">5. Simplification of Logic Circuits<\/h4>\n\n\n\n<p>Minimization objectives; K-maps<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><a href=\"https:\/\/pervasive.aau.at\/BR\/teaching\/ddc\/DDC_Chap_05.pdf\">Slides Chapter 5 (PDF)<\/a><\/li>\n\n\n\n<li><a href=\"https:\/\/pervasive.aau.at\/BR\/teaching\/ddc\/DDC_Chap_05_SE.pdf\">Self-Evaluation Sheet 5 (PDF)<\/a><\/li>\n<\/ul>\n\n\n\n<h4 class=\"wp-block-heading\">&nbsp;6. Combinational Functional Blocks<\/h4>\n\n\n\n<p>Multiplexer and demultiplexer; programmable logic devices<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><a href=\"https:\/\/pervasive.aau.at\/BR\/teaching\/ddc\/DDC_Chap_06.pdf\">Slides Chapter 6 (PDF)<\/a><\/li>\n\n\n\n<li><a href=\"https:\/\/pervasive.aau.at\/BR\/teaching\/ddc\/DDC_Chap_06_SE.pdf\">Self-Evaluation Sheet 6 (PDF)<\/a><\/li>\n<\/ul>\n\n\n\n<h4 class=\"wp-block-heading\">&nbsp;7. Arithmetic Combinational Circuits<\/h4>\n\n\n\n<p>Adder; subtractor; multiplier<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><a href=\"https:\/\/pervasive.aau.at\/BR\/teaching\/ddc\/DDC_Chap_07.pdf\">Slides Chapter 7 (PDF)<\/a><\/li>\n\n\n\n<li><a href=\"https:\/\/pervasive.aau.at\/BR\/teaching\/ddc\/DDC_Chap_07_SE.pdf\">Self-Evaluation Sheet 7 (PDF)<\/a><\/li>\n<\/ul>\n\n\n\n<div class=\"wp-block-columns is-layout-flex wp-container-core-columns-is-layout-28f84493 wp-block-columns-is-layout-flex\">\n<div class=\"wp-block-column is-layout-flow wp-block-column-is-layout-flow\" style=\"flex-basis:50%\">\n<figure class=\"wp-block-embed is-type-video is-provider-youtube wp-block-embed-youtube wp-embed-aspect-16-9 wp-has-aspect-ratio\"><div class=\"wp-block-embed__wrapper\">\n<iframe loading=\"lazy\" title=\"Ripple carry adder (lecture &quot;Design of Digital Circuits&quot;)\" width=\"800\" height=\"450\" src=\"https:\/\/www.youtube.com\/embed\/rtYcpXVFlC0?feature=oembed\" frameborder=\"0\" allow=\"accelerometer; autoplay; clipboard-write; encrypted-media; gyroscope; picture-in-picture; web-share\" referrerpolicy=\"strict-origin-when-cross-origin\" allowfullscreen><\/iframe>\n<\/div><figcaption class=\"wp-element-caption\">Half-, Full- and Ripple-Carry-Adder.<\/figcaption><\/figure>\n\n\n\n<p><\/p>\n<\/div>\n\n\n\n<div class=\"wp-block-column is-layout-flow wp-block-column-is-layout-flow\" style=\"flex-basis:50%\">\n<figure class=\"wp-block-embed is-type-video is-provider-youtube wp-block-embed-youtube wp-embed-aspect-16-9 wp-has-aspect-ratio\"><div class=\"wp-block-embed__wrapper\">\n<iframe loading=\"lazy\" title=\"Statusbits of binary addition and substraction (lecture &quot;Design of Digital Circuits&quot;)\" width=\"800\" height=\"450\" src=\"https:\/\/www.youtube.com\/embed\/nTmGuQNmnt0?feature=oembed\" frameborder=\"0\" allow=\"accelerometer; autoplay; clipboard-write; encrypted-media; gyroscope; picture-in-picture; web-share\" referrerpolicy=\"strict-origin-when-cross-origin\" allowfullscreen><\/iframe>\n<\/div><figcaption class=\"wp-element-caption\">Statusbits of binary addition and subtraction.<br>[Project file for Logisim-evolution: <a href=\"https:\/\/pervasive.aau.at\/BR\/teaching\/eds\/Statusbits.circ\">Statusbits.circ<\/a> (save as file)]<\/figcaption><\/figure>\n\n\n\n<p><\/p>\n<\/div>\n<\/div>\n\n\n\n<h4 class=\"wp-block-heading\">&nbsp;8. Sequential Logic<\/h4>\n\n\n\n<p>Storage elements; finite state machines; design of sequential logic; analysis of sequential logic<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><a href=\"https:\/\/pervasive.aau.at\/BR\/teaching\/ddc\/DDC_Chap_08.pdf\">Slides Chapter 8 (PDF)<\/a><\/li>\n\n\n\n<li><a href=\"https:\/\/pervasive.aau.at\/BR\/teaching\/ddc\/DDC_Chap_08_SE.pdf\">Self-Evaluation Sheet 8 (PDF)<\/a><\/li>\n<\/ul>\n\n\n\n<div class=\"wp-block-columns is-layout-flex wp-container-core-columns-is-layout-28f84493 wp-block-columns-is-layout-flex\">\n<div class=\"wp-block-column is-layout-flow wp-block-column-is-layout-flow\" style=\"flex-basis:50%\">\n<figure class=\"wp-block-embed is-type-video is-provider-youtube wp-block-embed-youtube wp-embed-aspect-16-9 wp-has-aspect-ratio\"><div class=\"wp-block-embed__wrapper\">\n<iframe loading=\"lazy\" title=\"Synchronous and asynchronous SR Latch (lecture &quot;Design of Digital Circuits&quot;)\" width=\"800\" height=\"450\" src=\"https:\/\/www.youtube.com\/embed\/PpoT7zY4-xc?feature=oembed\" frameborder=\"0\" allow=\"accelerometer; autoplay; clipboard-write; encrypted-media; gyroscope; picture-in-picture; web-share\" referrerpolicy=\"strict-origin-when-cross-origin\" allowfullscreen><\/iframe>\n<\/div><figcaption class=\"wp-element-caption\">Asynchronous and synchronous SR-Latch.<\/figcaption><\/figure>\n<\/div>\n\n\n\n<div class=\"wp-block-column is-layout-flow wp-block-column-is-layout-flow\" style=\"flex-basis:50%\">\n<figure class=\"wp-block-embed is-type-video is-provider-youtube wp-block-embed-youtube wp-embed-aspect-16-9 wp-has-aspect-ratio\"><div class=\"wp-block-embed__wrapper\">\n<iframe loading=\"lazy\" title=\"SR and JK FlipFlop (lecture &quot;Design of Digital Circuits&quot;)\" width=\"800\" height=\"450\" src=\"https:\/\/www.youtube.com\/embed\/ng4R6mfUtxk?feature=oembed\" frameborder=\"0\" allow=\"accelerometer; autoplay; clipboard-write; encrypted-media; gyroscope; picture-in-picture; web-share\" referrerpolicy=\"strict-origin-when-cross-origin\" allowfullscreen><\/iframe>\n<\/div><figcaption class=\"wp-element-caption\">RS- and JK-FlipFlop.<\/figcaption><\/figure>\n<\/div>\n<\/div>\n\n\n\n<div class=\"wp-block-columns is-layout-flex wp-container-core-columns-is-layout-28f84493 wp-block-columns-is-layout-flex\">\n<div class=\"wp-block-column is-layout-flow wp-block-column-is-layout-flow\">\n<figure class=\"wp-block-embed is-type-video is-provider-youtube wp-block-embed-youtube wp-embed-aspect-16-9 wp-has-aspect-ratio\"><div class=\"wp-block-embed__wrapper\">\n<iframe loading=\"lazy\" title=\"Traffic light control (lecture &quot;Design of Digital Circuits&quot;)\" width=\"800\" height=\"450\" src=\"https:\/\/www.youtube.com\/embed\/a5O_kCNjGNA?feature=oembed\" frameborder=\"0\" allow=\"accelerometer; autoplay; clipboard-write; encrypted-media; gyroscope; picture-in-picture; web-share\" referrerpolicy=\"strict-origin-when-cross-origin\" allowfullscreen><\/iframe>\n<\/div><figcaption class=\"wp-element-caption\">Traffic light control.<br>[Project file for Logisim-evolution: <a href=\"https:\/\/pervasive.aau.at\/BR\/teaching\/eds\/Ampelsteuerung.circ\">Ampelsteuerung.circ<\/a> (save as file)]<\/figcaption><\/figure>\n<\/div>\n\n\n\n<div class=\"wp-block-column is-layout-flow wp-block-column-is-layout-flow\"><\/div>\n<\/div>\n\n\n\n<h4 class=\"wp-block-heading\">&nbsp;9. Standard Sequential Circuits<\/h4>\n\n\n\n<p>Registers; register transfer and micro-operations; counter<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><a href=\"https:\/\/pervasive.aau.at\/BR\/teaching\/ddc\/DDC_Chap_09.pdf\">Slides Chapter 9 (PDF)<\/a><\/li>\n\n\n\n<li><a href=\"https:\/\/pervasive.aau.at\/BR\/teaching\/ddc\/DDC_Chap_09_SE.pdf\">Self-Evaluation 9 (PDF)<\/a><\/li>\n<\/ul>\n\n\n\n<div class=\"wp-block-columns is-layout-flex wp-container-core-columns-is-layout-28f84493 wp-block-columns-is-layout-flex\">\n<div class=\"wp-block-column is-layout-flow wp-block-column-is-layout-flow\">\n<figure class=\"wp-block-embed is-type-video is-provider-youtube wp-block-embed-youtube wp-embed-aspect-16-9 wp-has-aspect-ratio\"><div class=\"wp-block-embed__wrapper\">\n<iframe loading=\"lazy\" title=\"Synchronous binary counter (lecture &quot;Design of Digital Circuits&quot;)\" width=\"800\" height=\"450\" src=\"https:\/\/www.youtube.com\/embed\/rmvdqn2H06k?feature=oembed\" frameborder=\"0\" allow=\"accelerometer; autoplay; clipboard-write; encrypted-media; gyroscope; picture-in-picture; web-share\" referrerpolicy=\"strict-origin-when-cross-origin\" allowfullscreen><\/iframe>\n<\/div><figcaption class=\"wp-element-caption\">Synchronous Counter.<br>[Project file for Logisim-evolution: <a href=\"https:\/\/pervasive.aau.at\/BR\/teaching\/eds\/Zaehler.circ\">Zaehler.circ<\/a> (save as file)]<\/figcaption><\/figure>\n<\/div>\n\n\n\n<div class=\"wp-block-column is-layout-flow wp-block-column-is-layout-flow\"><\/div>\n<\/div>\n\n\n\n<h4 class=\"wp-block-heading\">&nbsp;10. Memory<\/h4>\n\n\n\n<p>Memory basics; SRAM; DRAM; flash-memory and hard disc drives<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><a href=\"https:\/\/pervasive.aau.at\/BR\/teaching\/ddc\/DDC_Chap_10.pdf\">Slides Chapter 10 (PDF)<\/a><\/li>\n\n\n\n<li><a href=\"https:\/\/pervasive.aau.at\/BR\/teaching\/ddc\/DDC_Chap_10_SE.pdf\">Self-Evaluation Sheet 10<\/a><a href=\"https:\/\/pervasive.aau.at\/BR\/teaching\/eds\/EdS_Kap_10_SE.pdf\"> (PDF)<\/a><\/li>\n<\/ul>\n\n\n\n<h4 class=\"wp-block-heading\">&nbsp;11. Microprocessor Basics<\/h4>\n\n\n\n<p>Von-Neumann architecture; model processor; time behavior<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><a href=\"https:\/\/pervasive.aau.at\/BR\/teaching\/ddc\/DDC_Chap_11.pdf\">Slides Chapter 11 (PDF)<\/a><\/li>\n\n\n\n<li><a href=\"https:\/\/pervasive.aau.at\/BR\/teaching\/ddc\/DDC_Chap_11_SE.pdf\">Self-Evaluation Sheet 11 (PDF)<\/a><\/li>\n<\/ul>\n\n\n\n<div class=\"wp-block-columns is-layout-flex wp-container-core-columns-is-layout-28f84493 wp-block-columns-is-layout-flex\">\n<div class=\"wp-block-column is-layout-flow wp-block-column-is-layout-flow\">\n<figure class=\"wp-block-embed is-type-video is-provider-youtube wp-block-embed-youtube wp-embed-aspect-16-9 wp-has-aspect-ratio\"><div class=\"wp-block-embed__wrapper\">\n<iframe loading=\"lazy\" title=\"Model processor (lecture &quot;Design of Digital Circuits&quot;)\" width=\"800\" height=\"450\" src=\"https:\/\/www.youtube.com\/embed\/dvrikiIMhqs?feature=oembed\" frameborder=\"0\" allow=\"accelerometer; autoplay; clipboard-write; encrypted-media; gyroscope; picture-in-picture; web-share\" referrerpolicy=\"strict-origin-when-cross-origin\" allowfullscreen><\/iframe>\n<\/div><figcaption class=\"wp-element-caption\">Data path of the model processors.<\/figcaption><\/figure>\n<\/div>\n\n\n\n<div class=\"wp-block-column is-layout-flow wp-block-column-is-layout-flow\">\n<figure class=\"wp-block-embed is-type-video is-provider-youtube wp-block-embed-youtube wp-embed-aspect-16-9 wp-has-aspect-ratio\"><div class=\"wp-block-embed__wrapper\">\n<iframe loading=\"lazy\" title=\"Arithmetic unit of the model processor (lecture &quot;Design of Digital Circuits&quot;)\" width=\"800\" height=\"450\" src=\"https:\/\/www.youtube.com\/embed\/eo-0KkVYDqg?feature=oembed\" frameborder=\"0\" allow=\"accelerometer; autoplay; clipboard-write; encrypted-media; gyroscope; picture-in-picture; web-share\" referrerpolicy=\"strict-origin-when-cross-origin\" allowfullscreen><\/iframe>\n<\/div><figcaption class=\"wp-element-caption\">Arithmetic unit of the model processor.<\/figcaption><\/figure>\n<\/div>\n<\/div>\n","protected":false},"excerpt":{"rendered":"<p>This undergraduate lecture introduces the fundamentals of the design of digital circuits. Topics include Boolean algebra, combinatorial circuits, arithmetic circuits, flip flops, sequential circuits, memory systems, and computer architecture basics. The lecture is held in English in the summer term, primarily for the Bachelor program &#8220;Robotics and Artificial Intelligence&#8220;. A [&hellip;]<\/p>\n","protected":false},"author":1,"featured_media":0,"parent":36,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"footnotes":""},"class_list":["post-7041","page","type-page","status-publish","hentry"],"_links":{"self":[{"href":"https:\/\/bernhardrinner.com\/index.php?rest_route=\/wp\/v2\/pages\/7041","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/bernhardrinner.com\/index.php?rest_route=\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/bernhardrinner.com\/index.php?rest_route=\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/bernhardrinner.com\/index.php?rest_route=\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/bernhardrinner.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=7041"}],"version-history":[{"count":27,"href":"https:\/\/bernhardrinner.com\/index.php?rest_route=\/wp\/v2\/pages\/7041\/revisions"}],"predecessor-version":[{"id":7382,"href":"https:\/\/bernhardrinner.com\/index.php?rest_route=\/wp\/v2\/pages\/7041\/revisions\/7382"}],"up":[{"embeddable":true,"href":"https:\/\/bernhardrinner.com\/index.php?rest_route=\/wp\/v2\/pages\/36"}],"wp:attachment":[{"href":"https:\/\/bernhardrinner.com\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=7041"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}